Did any machines alternate between two video memory banks?
If a home computer or console has two banks of memory, A and B, then the following design is possible:
The video chip only connects to bank A. The CPU connects to both. During active scan line, CPU access to bank A is slow because it must share bandwidth with the video chip, but it can access bank B at full speed. This is useful because you can put code and non-video data in bank B, though the CPU will still hit some slowdown because it must write to bank A in order to prepare the next frame while the current one is showing.
The Amiga is perhaps the best-known example of this design; the two banks were called chip memory (the first 512K) and fast memory (the rest), respectively. The 48K Spectrum was also a popular example; the two banks were the first 16K and the other 32K respectively.
It seems to me you could improve performance with a variant design: as above, except the video chip and the CPU each connect to both banks.
In the first frame, the video chip displays from bank A while the CPU prepares the next frame in bank B.
In the second frame, the video chip switches to displaying from bank B while the CPU prepares the next frame in bank A.
In the third frame, it switches back to the first arrangement, etc.
It seems to me this fairly minor variation on the historical design would allow the CPU to always work at full speed even when writing the data for the next frame. (In this context, I'm just thinking about scenarios where the CPU does that work, not ones where the video chip itself contains acceleration hardware that writes to video memory.)
Did any historical machines work the way I suggest, with video chip and CPU switching back-and-forth between two banks each frame? If not, why not? Is there some disadvantage I'm not taking into account?
hardware video
asked 2 hours ago
rwallace
7,672336108
add a comment |
If a home computer or console has two banks of memory, A and B, then the following design is possible:
The video chip only connects to bank A. The CPU connects to both. During active scan line, CPU access to bank A is slow because it must share bandwidth with the video chip, but it can access bank B at full speed. This is useful because you can put code and non-video data in bank B, though the CPU will still hit some slowdown because it must write to bank A in order to prepare the next frame while the current one is showing.
The Amiga is perhaps the best-known example of this design; the two banks were called chip memory (the first 512K) and fast memory (the rest), respectively. The 48K Spectrum was also a popular example; the two banks were the first 16K and the other 32K respectively.
It seems to me you could improve performance with a variant design: as above, except the video chip and the CPU each connect to both banks.
In the first frame, the video chip displays from bank A while the CPU prepares the next frame in bank B.
In the second frame, the video chip switches to displaying from bank B while the CPU prepares the next frame in bank A.
In the third frame, it switches back to the first arrangement, etc.
It seems to me this fairly minor variation on the historical design would allow the CPU to always work at full speed even when writing the data for the next frame. (In this context, I'm just thinking about scenarios where the CPU does that work, not ones where the video chip itself contains acceleration hardware that writes to video memory.)
Did any historical machines work the way I suggest, with video chip and CPU switching back-and-forth between two banks each frame? If not, why not? Is there some disadvantage I'm not taking into account?
hardware video
asked 2 hours ago
rwallace
7,672336108
2
Given that serial accesses are more likely than not, I always wondered why a design didn't use the low bit of addressing to select a RAM bank, and halt the CPU only if it is accessing the same one as video that cycle. But I think the answer always ends up back at fixed memory maps and caution about growing RAM sizes: it's impossible to consolidate two distinct banks of chips into a single bank if both need to be accessed simultaneously.
– Tommy
2 hours ago
1
It's an interesting question. The cost and performance should be compared with dual ported RAM which achieves the same result.
– traal
2 hours ago
Calling the Amiga's fast and chip RAM "banked memory" is quite a bit of injustice.
– tofro
2 hours ago
@tofro Why? It's a general and accurate description – or, are you thinking of some more specialized usage of the term, that would not be applicable in this case?
– rwallace
1 hour ago
add a comment |
If a home computer or console has two banks of memory, A and B, then the following design is possible:
The video chip only connects to bank A. The CPU connects to both. During active scan line, CPU access to bank A is slow because it must share bandwidth with the video chip, but it can access bank B at full speed. This is useful because you can put code and non-video data in bank B, though the CPU will still hit some slowdown because it must write to bank A in order to prepare the next frame while the current one is showing.
The Amiga is perhaps the best-known example of this design; the two banks were called chip memory (the first 512K) and fast memory (the rest), respectively. The 48K Spectrum was also a popular example; the two banks were the first 16K and the other 32K respectively.
It seems to me you could improve performance with a variant design: as above, except the video chip and the CPU each connect to both banks.
In the first frame, the video chip displays from bank A while the CPU prepares the next frame in bank B.
In the second frame, the video chip switches to displaying from bank B while the CPU prepares the next frame in bank A.
In the third frame, it switches back to the first arrangement, etc.
It seems to me this fairly minor variation on the historical design would allow the CPU to always work at full speed even when writing the data for the next frame. (In this context, I'm just thinking about scenarios where the CPU does that work, not ones where the video chip itself contains acceleration hardware that writes to video memory.)
Did any historical machines work the way I suggest, with video chip and CPU switching back-and-forth between two banks each frame? If not, why not? Is there some disadvantage I'm not taking into account?
hardware video
asked 2 hours ago
rwallace
7,672336108
If a home computer or console has two banks of memory, A and B, then the following design is possible:
The video chip only connects to bank A. The CPU connects to both. During active scan line, CPU access to bank A is slow because it must share bandwidth with the video chip, but it can access bank B at full speed. This is useful because you can put code and non-video data in bank B, though the CPU will still hit some slowdown because it must write to bank A in order to prepare the next frame while the current one is showing.
The Amiga is perhaps the best-known example of this design; the two banks were called chip memory (the first 512K) and fast memory (the rest), respectively. The 48K Spectrum was also a popular example; the two banks were the first 16K and the other 32K respectively.
It seems to me you could improve performance with a variant design: as above, except the video chip and the CPU each connect to both banks.
In the first frame, the video chip displays from bank A while the CPU prepares the next frame in bank B.
In the second frame, the video chip switches to displaying from bank B while the CPU prepares the next frame in bank A.
In the third frame, it switches back to the first arrangement, etc.
It seems to me this fairly minor variation on the historical design would allow the CPU to always work at full speed even when writing the data for the next frame. (In this context, I'm just thinking about scenarios where the CPU does that work, not ones where the video chip itself contains acceleration hardware that writes to video memory.)
Did any historical machines work the way I suggest, with video chip and CPU switching back-and-forth between two banks each frame? If not, why not? Is there some disadvantage I'm not taking into account?
hardware video
hardware video
asked 2 hours ago
rwallace
7,672336108
asked 2 hours ago
rwallace
7,672336108
asked 2 hours ago
rwallace
7,672336108
asked 2 hours ago
rwallace
7,672336108
asked 2 hours ago
rwallace
7,672336108
7,672336108
2
Given that serial accesses are more likely than not, I always wondered why a design didn't use the low bit of addressing to select a RAM bank, and halt the CPU only if it is accessing the same one as video that cycle. But I think the answer always ends up back at fixed memory maps and caution about growing RAM sizes: it's impossible to consolidate two distinct banks of chips into a single bank if both need to be accessed simultaneously.
– Tommy
2 hours ago
1
It's an interesting question. The cost and performance should be compared with dual ported RAM which achieves the same result.
– traal
2 hours ago
Calling the Amiga's fast and chip RAM "banked memory" is quite a bit of injustice.
– tofro
2 hours ago
@tofro Why? It's a general and accurate description – or, are you thinking of some more specialized usage of the term, that would not be applicable in this case?
– rwallace
1 hour ago
add a comment |
2
Given that serial accesses are more likely than not, I always wondered why a design didn't use the low bit of addressing to select a RAM bank, and halt the CPU only if it is accessing the same one as video that cycle. But I think the answer always ends up back at fixed memory maps and caution about growing RAM sizes: it's impossible to consolidate two distinct banks of chips into a single bank if both need to be accessed simultaneously.
– Tommy
2 hours ago
1
It's an interesting question. The cost and performance should be compared with dual ported RAM which achieves the same result.
– traal
2 hours ago
Calling the Amiga's fast and chip RAM "banked memory" is quite a bit of injustice.
– tofro
2 hours ago
@tofro Why? It's a general and accurate description – or, are you thinking of some more specialized usage of the term, that would not be applicable in this case?
– rwallace
1 hour ago
2
2
Given that serial accesses are more likely than not, I always wondered why a design didn't use the low bit of addressing to select a RAM bank, and halt the CPU only if it is accessing the same one as video that cycle. But I think the answer always ends up back at fixed memory maps and caution about growing RAM sizes: it's impossible to consolidate two distinct banks of chips into a single bank if both need to be accessed simultaneously.
– Tommy
2 hours ago
Given that serial accesses are more likely than not, I always wondered why a design didn't use the low bit of addressing to select a RAM bank, and halt the CPU only if it is accessing the same one as video that cycle. But I think the answer always ends up back at fixed memory maps and caution about growing RAM sizes: it's impossible to consolidate two distinct banks of chips into a single bank if both need to be accessed simultaneously.
– Tommy
2 hours ago
1
1
It's an interesting question. The cost and performance should be compared with dual ported RAM which achieves the same result.
– traal
2 hours ago
It's an interesting question. The cost and performance should be compared with dual ported RAM which achieves the same result.
– traal
2 hours ago
Calling the Amiga's fast and chip RAM "banked memory" is quite a bit of injustice.
– tofro
2 hours ago
Calling the Amiga's fast and chip RAM "banked memory" is quite a bit of injustice.
– tofro
2 hours ago
@tofro Why? It's a general and accurate description – or, are you thinking of some more specialized usage of the term, that would not be applicable in this case?
– rwallace
1 hour ago
@tofro Why? It's a general and accurate description – or, are you thinking of some more specialized usage of the term, that would not be applicable in this case?
– rwallace
1 hour ago
add a comment |
1 Answer
1
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The Apple IIe with 80-column text card was capable of something like this. It came with a second, 64K memory space available through bank-switching. From page 23 of The Apple IIe Technical Reference Manual:
Data for the high-resolution graphics displays are stored in either of two 8192-byte areas in memory. These areas are called High-Resolution Page 1 and Page 2; think of them as buffers where you can put data to be displayed.
There were separate latches from the main memory and the alternate memory space on the expansion card, and in double-high resolution, you would enable both latches, interlacing the bitmaps stored in each buffer. The two halves of video memory were split between $2000–$3FFF of the main memory space and the alternate memory space. See page 35 of the manual, among other places.
The Apple IIe did not, however, give faster access to banks of memory the current video mode was not using.
answered 2 hours ago
Davislor
880210
1
Though you get the same memory access speed regardless of which banks are on display.
– Tommy
1 hour ago
@Tommy Good point.
– Davislor
31 mins ago
add a comment |
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The Apple IIe with 80-column text card was capable of something like this. It came with a second, 64K memory space available through bank-switching. From page 23 of The Apple IIe Technical Reference Manual:
Data for the high-resolution graphics displays are stored in either of two 8192-byte areas in memory. These areas are called High-Resolution Page 1 and Page 2; think of them as buffers where you can put data to be displayed.
There were separate latches from the main memory and the alternate memory space on the expansion card, and in double-high resolution, you would enable both latches, interlacing the bitmaps stored in each buffer. The two halves of video memory were split between $2000–$3FFF of the main memory space and the alternate memory space. See page 35 of the manual, among other places.
The Apple IIe did not, however, give faster access to banks of memory the current video mode was not using.
answered 2 hours ago
Davislor
880210
1
Though you get the same memory access speed regardless of which banks are on display.
– Tommy
1 hour ago
@Tommy Good point.
– Davislor
31 mins ago
add a comment |
The Apple IIe with 80-column text card was capable of something like this. It came with a second, 64K memory space available through bank-switching. From page 23 of The Apple IIe Technical Reference Manual:
Data for the high-resolution graphics displays are stored in either of two 8192-byte areas in memory. These areas are called High-Resolution Page 1 and Page 2; think of them as buffers where you can put data to be displayed.
There were separate latches from the main memory and the alternate memory space on the expansion card, and in double-high resolution, you would enable both latches, interlacing the bitmaps stored in each buffer. The two halves of video memory were split between $2000–$3FFF of the main memory space and the alternate memory space. See page 35 of the manual, among other places.
The Apple IIe did not, however, give faster access to banks of memory the current video mode was not using.
answered 2 hours ago
Davislor
880210
1
Though you get the same memory access speed regardless of which banks are on display.
– Tommy
1 hour ago
@Tommy Good point.
– Davislor
31 mins ago
add a comment |
The Apple IIe with 80-column text card was capable of something like this. It came with a second, 64K memory space available through bank-switching. From page 23 of The Apple IIe Technical Reference Manual:
Data for the high-resolution graphics displays are stored in either of two 8192-byte areas in memory. These areas are called High-Resolution Page 1 and Page 2; think of them as buffers where you can put data to be displayed.
There were separate latches from the main memory and the alternate memory space on the expansion card, and in double-high resolution, you would enable both latches, interlacing the bitmaps stored in each buffer. The two halves of video memory were split between $2000–$3FFF of the main memory space and the alternate memory space. See page 35 of the manual, among other places.
The Apple IIe did not, however, give faster access to banks of memory the current video mode was not using.
answered 2 hours ago
Davislor
880210
The Apple IIe with 80-column text card was capable of something like this. It came with a second, 64K memory space available through bank-switching. From page 23 of The Apple IIe Technical Reference Manual:
Data for the high-resolution graphics displays are stored in either of two 8192-byte areas in memory. These areas are called High-Resolution Page 1 and Page 2; think of them as buffers where you can put data to be displayed.
There were separate latches from the main memory and the alternate memory space on the expansion card, and in double-high resolution, you would enable both latches, interlacing the bitmaps stored in each buffer. The two halves of video memory were split between $2000–$3FFF of the main memory space and the alternate memory space. See page 35 of the manual, among other places.
The Apple IIe did not, however, give faster access to banks of memory the current video mode was not using.
answered 2 hours ago
Davislor
880210
edited 29 mins ago
answered 2 hours ago
Davislor
880210
answered 2 hours ago
Davislor
880210
answered 2 hours ago
Davislor
880210
880210
1
Though you get the same memory access speed regardless of which banks are on display.
– Tommy
1 hour ago
@Tommy Good point.
– Davislor
31 mins ago
add a comment |
1
Though you get the same memory access speed regardless of which banks are on display.
– Tommy
1 hour ago
@Tommy Good point.
– Davislor
31 mins ago
1
1
Though you get the same memory access speed regardless of which banks are on display.
– Tommy
1 hour ago
Though you get the same memory access speed regardless of which banks are on display.
– Tommy
1 hour ago
@Tommy Good point.
– Davislor
31 mins ago
@Tommy Good point.
– Davislor
31 mins ago
add a comment |
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2
Given that serial accesses are more likely than not, I always wondered why a design didn't use the low bit of addressing to select a RAM bank, and halt the CPU only if it is accessing the same one as video that cycle. But I think the answer always ends up back at fixed memory maps and caution about growing RAM sizes: it's impossible to consolidate two distinct banks of chips into a single bank if both need to be accessed simultaneously.
– Tommy
2 hours ago
1
It's an interesting question. The cost and performance should be compared with dual ported RAM which achieves the same result.
– traal
2 hours ago
Calling the Amiga's fast and chip RAM "banked memory" is quite a bit of injustice.
– tofro
2 hours ago
@tofro Why? It's a general and accurate description – or, are you thinking of some more specialized usage of the term, that would not be applicable in this case?
– rwallace
1 hour ago